6-8.
6-9.
6-10.
6-11.
(b) source
(b) destination
6-12.
6-13.
Controlled by the IOC; responds to the CPU by
using the O bus.
1. E
2. F
3. G
4. H
Transmits individual signals to control and
coordinate the operations of the computer.
1. A
2. B
3. C
4. D
Transmits addresses and data by using clock
cycles.
1. E
2. F
3. G
4. H
Acts as a requester; sends requests from other
computers.
1. E
2. F
3. G
4. H
What device accepts requests and uses a priority
network to determine the order in which it is to
respond to the requesters?
1. Operand bus extender
2. REI bus extender
3. CPU
4. DMI
Regardless of whether a computer has an IOC or
not, the CPU will control all buses.
1. True
2. False
6-14.
6-15.
6-16.
6-17.
6-18.
36
In bus communications, which of the following
factors relating to the data being transferred must
be considered?
1. Source only
2. Destination only
3. Transfer priority only
4. Source, destination, and transfer priority
Bus requests may be made by all of the following
parts except which one?
1. CPU
2. IOC
3. Memory
4. DMI
Holding registers are used by source and
destination sections to prevent data loss and to
help coordinate data exchange.
1. True
2. False
In the exchange of data on the buses, (a) what
logic generates a ready signal when data is in the
holding register and on the bus and (b) what logic
sends an accept signal?
1. (a) Source
(b) source
2. (a) Source
(b) destination
3. (a) Destination
4. (a) Destination
Which of the following items is/are stored in main
memory?
1. Data and programs only
2. Calculations and operands only
3. Data, programs, and PROMS
4. Data, programs, calculations, and operands
