5-14. In newer computers, which of the following
methods can be used to retain multiple interrupt
codes of the same class?
1. Interrupt stack only
2. Interrupt queue only
3. Both interrupt stack and queue
4. Index registers
5-15. For an interrupt signal in a particular class to be
indicated to the CPU, what minimum number of
interrupts must be present?
1. One
2. Two
3. Three
4. Four
A. Terminate current program execution
B. Lock out all interrupts
C. Store program and register data
D. Retrieve interrupt processor data
E. Enter executive state and enable desired
interrupts
F. Execute interrupt processor program
G. Return to original process
Figure 5-A.--Interrupt handling process steps.
IN ANSWERING QUESTIONS 5-16 THROUGH 5-23,
REFER TO FIGURE 5-A ABOVE AND FIGURE 5-9
ON PAGE 5-13 OF THE TRAMAN. SELECT THE
MOST APPROPRIATE INTERRUPT HANDLING
PROCESS STEP FOR THE PROCESS DESCRIBED
IN EACH QUESTION.
5-16. New interrupts are locked out to protect the
integrity of the process that ensures returning to
the same conditions after processing the interrupt.
5-17.
5-18.
5-19.
5-20.
5-21.
The step in which the interrupt process will be
initiated.
1. A
2. B
3. C
4. D
In newer computers, a separate register set for
each task and executive state is used, and these
registers are disabled and the contents protected
until the appropriate state is entered.
1. A
2. B
3. C
4. D
The computer enters the required executive state
and enables the interrupts that in turn interrupt
the interrupt processor after the status registers
are loaded.
1. B
2. C
3. D
4. E
The new executive state registers are loaded with
the interrupt processor program data after the
register data is saved.
1. B
2. C
3. D
4. E
The current processs register data is stored with
at least the contents of the program counter and
status register(s).
1. A
2. B
3. C
4. D
1. A
2. B
3. C
4. D
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