5-22. The first instruction of an interrupt routine is executed after the interrupt code words are sampled. 1.   D 2.   E 3.   F 4.   G 5-23. The program counter and status register(s) is/are reloaded with the saved data. The next instruction, prior to the interrupt (instruction 4), is called up by the program counter. 1.   D 2.   E 3.   F 4.   G 5-24. Less time is required to access control memory than to access main memory. 1.   True 2.   False 5-25. Where is cache memory usually located in a computer? 1. In main memory 2. In the I/O section 3. Between the CPU’s control and ALU sections 4. Between main memory and the CPU 5-26. For rapid data transfers, what two types of semiconductor  devices  are  usually  used  by  cache memories? 1. Bipolar DRAMs and MOS SRAMs 2. Bipolar SRAMs and bipolar DRAMs 3. MOS SRAMs and MOS DRAMs 4. MOS DRAMs and bipolar SRAMs 5-27. 5-28. 5-29. 5-30. 5-31 In terms of access and capacity of a cache memory, a cache memory is usually on the order of one magnitude (a) than main (slower; faster) memory and its capacity is two orders of magnitude (b) than main memory. (less; more) 1.  (a)  Slower (b) less 2.  (a)  Slower (b) more 3.  (a)  Faster (b) less 4.  (a)  Faster (b) more Which of the following methods can be used by a cache memory to indicate which entries of main memory have been copied into it? 1.  A  hit 2. A tag store 3.  An  identifier 4. Both 2 and 3 above Which of the following properties pertain(s) to cache memory? 1  . 2  . 3  . 4  . A high-speed memory A logical network and an old entries replacement  method Timing and control All of the above To indicate that data from the requested address is present, which, if any, of the following terms is used? 1.   Hit 2.  Miss 3.   Tag 4. None of the above What area of cache memory writes only to the directories? 1.  Updates 2.  Invalidates 3.  Searches 4.  Tags 30