Figure 6-20.—Memory location words.
The memory capacity of a film core storage device
is determined by the number of packets and the size of
the arrays in the memory stack. By varying the number
of word lines and diode assemblies in each array
(64 by 64, 128 by 128, and so on) and the number of
packets in a memory stack, great flexibility can be
achieved in the design of a mated film storage device’s
memory word length and number of addressable
memory words. Mated film stacks are usually divided
into words at each memory location (fig. 6-20). Instead
of one word of so many bits in length at a given location,
the computer has the option of selecting one of up to
four words at each memory location.
Mated Film Address Selection
The address selection process in mated film
memory uses the row (x)/column (y) concept just as
core memory does. With mated film memory, the
ultimate goal is not only to select an address location
but to select a word at that memory address location.
The upper bits in the address register are used to select
the stack and the word at the memory location. The
remainder of the bits are used to form matrices that in
turn select one of an upper or lower diverter; this
circuitry will select the location of the memory address.
The address register bits are used to translate the bits to
make the selections in the following order:
Stack
Location (if a 64 by 64 array, one of 4096)
Word at the address location
Figure 6-21 is an example of the register used to
select a memory word at an address location.
Figure 6-21.—Address register used to select location and word.
6-17
